Smith Arnold Partners’ Post

We're excited to announce a new opportunity within our Automotive Software team! We are currently looking to hire a Senior/Staff Product Manager who will be primarily responsible for driving Automotive Display and GPU. This role will report directly to me. If you can show industry expertise in Display and GPU technology, we would love to hear from you! Experience in Automotive Software Engineering concepts, JIRA, CodeBeamer will be a bonus. Apply now: https://lnkd.in/gt_-YmRA ID: 3062803 Overview: The successful candidate will help to define and drive automotive-specific multimedia technology (internal IP, external/3P IP, Silicon, Software) product roadmap within Qualcomm’s Automotive business unit. 1) Working with Core Multimedia Technology Product Management teams to leverage existing technology roadmaps as well as aligning and contributing new requirements for future SoCs and shared SW Architectures, specifically: o   Display o   Graphics o   Audio, Video, VIRT I/0, Hypervisor, specific dependencies for Display & Graphics 2) Coordinating primarily display/gpu and related technology features across hardware & software roadmaps for Automotive BU paying consideration to: •   A portfolio which can be leveraged by OEMs, Tier1s and ISVs in the Automotive eco-system •   Ability to work with eco-system partners to provide scalable software offering to customers •   Flexibility within portfolio to respond to changing needs of Digital Cockpit, ADAS, Safety, Automotive Security and Connected Car software requirements  3) Working with core technology product teams and working with leading 3rd party/external technology providers/ecosystem to develop long-term trusted partnerships & solutions to foster roadmap, interface & technology alignment over lengthy automotive product life-cycle: •   Identify & co-ordinate mutual functional-safety requirements with 3rd party visual & display partners Key Responsibilities: •   Collection and Prioritization of Product Requirements, Feature Requests and Software Products to ensure key customer milestones are met in an optimized and efficient manner. •   Generation of the business case associated with any proposed software product •   Working with core multimedia technology management, automotive chipset product management, business development, eco-system management, engineering, program management, customer support and marketing teams to ensure timely and cost-effective delivery of customer SW releases and Proof of Concept & Demo products for internal and external use. •   Working with the Legal, Contracts, Engineering and business support teams to ensure that the necessary in-sourcing and out-bound licensing and SOW agreements and processes are in place to efficiently work with partners, customers and suppliers - including collection and generation of comprehensive documentation of 3rd Party, Proprietary and Open Source Intellectual Property. The preferred location for this position would be in San Diego, CA.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/gKsVPi-V Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

Opportunity

Folks. I would like to clarify an apparent misunderstanding. I think there is a bevy of recruiters seeing my CTO title and thinking that this is in some way related to the IT industry. Although I have done my share of IT, it was never in the world of today, where Windows dominates. I was a CTO before the IT industry co-opted the term. Chief Technology Officer once had meaning other than interpreting 'Technology" as exclusive to IT. IT is largely based on Microsoft these days. I despise Microsoft and there is zero chance I would entertain a career based on that OS. SunOS, HPUX, SGI, etc. are real operating systems that rarely crash and have zero intent to steal/sell/ invade personal information. I managed technology in an industrial production environment in the technology intense printed circuit board industry. That included, amongst many others, physics, chemistry, operations, machinery, mechanical and electrical engineering, CAD/CAM, etc. We used that title as the coverage of the technologies that were so varied and vast that one could not pigeon hole anything specific. I am a problem solver first and foremost. It matters little to me what the problem is. SO, IT recruiters.....I am NOT your guy.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/gKsVPi-V Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/gWBN_KmC Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/gWBN_KmC Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/d_hs_Ddc Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/d_hs_Ddc Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#hiring Senior Principal Engineer - Signoff, San Jose, United States, fulltime #jobs #jobseekers #careers #SanJosejobs #Californiajobs #Engineering Apply: https://lnkd.in/d_hs_Ddc Job Overview: Arm has formed a new group to develop outstanding silicon demonstrators based on Arm's IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure and automotive. Using the latest nodes, e.g. 3nm today, and applying the latest SoC 2.5D and 3D technology, Arm's ambition is to demonstrate industry outstanding performance by architecting, designing, implementing, and fabricating innovative silicon chips. Responsibilities: Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon. The following are the immediate challenges we will be working on as a team: We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria! Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's Required Skills and Experience : Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes. Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors Work experience in Physical Implementation and Signoff methodologies Must have worked on methodology development on 5nm or 3nm technologies Strong data analysis skills to fetch data, analyze and provide practical insights "Nice To Have" Skills and Experience : Masters in Electrical Engineering Strong coding skills in Python or R or an equivalent language Strong presentation skills Salary Range From $2 46,925.00 To $ 319,550.00 We value people as individuals and our commitment is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. In Return: We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.